Low-Power FPGA Design Using Memoization-Based Approximate Computing
Abstract : Field-programmable gate arrays (FPGAs) are increasingly used as the computing platform for fast and energyefficient execution of recognition, mining, and search applications. Approximate computing is one promising method for achieving energy efficiency. Compared with most prior works on approximate computing, which target approximate processors and arithmetic blocks, this paper presents an approximate computing methodology for FPGA-based design. It studies memoization as a method for approximation on FPGA and analyzes different architectural and design parameters that should be considered. The proposed design flow leverages on high-level synthesis to enable memoization-based micro architecture generation, thus also facilitating a C-to-register-transfer-level synthesis. When compared with the previous approaches of bit-width truncation and approximate multipliers, memoization-based approximate computation on FPGA achieves a significant dynamic power saving (around 20%) with very small area overhead (<5%) and better power-to-signal noise ratio values for the studied image processing benchmarks.
? It is understood that the existing applications developed with conventional languages may not be able to scale well with AC.
? It achieves relatively robust pattern recognition performance established concepts in optimization theory.
? Despite this mathematical classicism, the implementation of efficient SVM solvers has diverged from the classical methods of numerical optimization.
? This divergence is common to virtually all learning algorithms.
? In the case of learning algorithms, two other factors mitigate the impact of optimization accuracy. SVMs (Support Vector Machines) are a useful technique for data classification.
? These also present an additional load on the clock network on the FPGA and may impact the maximum operating frequency of the design if not managed properly.
? The choice of similarity measure can have a significant impact on the final power dissipation.
? This problem, can have a promising solution in the form of a computing paradigm known as Approximate Computing (AC).
? They employed the techniques to solve problems of clustering with a mixed model where large volumes of data of off-chip is needed.
? When NNs are injected into code, the divergence issues are removed but at the cost of loss in quality.
• This system proposed memoization as a method for approximation on VLSI Circuits, analyzes different architectural and design parameters that should be considered.
• The proposed design flow leverages on high-level synthesis to enable memoization-based microarchitecture generation, thus also facilitating a HDL-to-register-transfer-level synthesis.
• Approximate computing has been proposed as an alternative to exact computing for power reduction in embedded computing systems.
• The proposed design methodology is more oriented toward FPGA than ASIC, because it is not possible to utilize ASIC design techniques, such as multiple voltage islands, power gating, and so on, in subsisting FPGAs.
? In this way, memoization has the potential to improve the performance and save energy by trading computation for a few memory operations.
? Approximate computing on FPGA has been discussed in, which focuses on overclocking of adders used in image-processing filters for performance acceleration.
? In fact, energy efficiency is one of the main driving forces behind approximate computing.
? These are simple data sets with one or two distinct images, which are characterized for three different embedded processors, whose instruction set architectures are then modified based on characterization to achieve energy efficiency by reusing tolerant regions.
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