A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications
Abstract : Transpose-form finite impulse response (FIR) structures are inherently pipelined and support multiple constant multiplication (MCM) results in significant saving of computation. However, transpose-form configuration does not directly support the block processing unlike direct-form configuration. In this paper, we explore the possibility of realization of block FIR filter in transpose-from configuration for area-delay efficient realization of large order FIR filters for both fixed and reconfigurable applications. Based on detail computational analysis of transpose-form configuration of FIR filter we have derived a flowgraph for transpose-from block FIR filter with optimized register complexity. A generalized block formulation is presented for transpose-from FIR filter. We have derived a general multiplierbased architecture for the proposed transpose-form block filter for reconfigurable applications. A low-complexity design using MCM scheme is also presented for the block implementation of fixed FIR filters. Performance comparison shows that the proposed structure involves significantly less area-delay product (ADP) and less energy per sample (EPS) than the existing block direct-form structure for medium or large filter lengths while for the short-length filters, the existing block direct-form FIR structure has less ADP and less EPS than the proposed structure. ASIC synthesis result shows that the proposed structure for block-size 4 and filter-length 64 involve 42% less ADP and 40% less EPS than the best available FIR structure proposed for reconfigurable applications. For the same filter length and the same block size, the proposed structure involves 13% less ADP and 12.8% less EPS than that of the existing direct-from block FIR structure. Based on these findings, we present a scheme for the selection of direct-form and transpose-form configuration based on the filter lengths and block-length for obtaining areadelay and energy efficient block FIR structures.
? In the existing method, the possibility of realization of FIR filter in transpose form configuration to achieve efficient area and delay for large order FIR filters were explored.
? The proposed structure significantly reduces the area delay product (ADP) and energy per sample (EPS) than the existing FIR structure.
? In the existing method, the implementation of direct-form structure has less area delay product (ADP) and less energy per sample (EPS) for the short-length filters.
? The proposed structure has the best results in the reduction of number of slices, LUTs, power consumption, area delay product, energy per sample than the existing method for higher order FIR filter.
? Element usage is high
? Cycle period is high
? We've offered a procedure to find out the MCM blocks for horizontal and vertical sub expression elimination inside the proposed block FIR filter for constant coefficients to minimize the computational problem.
• The proposed form involves substantially a low area delay product (ADP) and much low energy per sample (EPS) than the prevailing block implementation of direct shape for average or large filters, at the same time as for the small filters, the block implementation of direct shape has less ADP and much less EPS compared to the proposed form.
• The layout techniques proposed are extra appropriate for two-d fir filters and block least imply square adaptive filters.
• In this proposed method, the carry look ahead adder is used to increase the speed and also to reduce the area and power consumption.
? The area-delay performance of the proposed structure is found better than that of direct-form structure of for higher filter lengths due to smaller cycle period.
? Filter coefficients very often remain constant and known a priori in signal processing applications.
? Several designs have been suggested by various researchers for efficient realization of FIR filters (having fixed coefficients) using distributed arithmetic (DA) and multiple constant multiplication (MCM) methods.
? In this paper we explore the possibility of realization of block FIR filter in transpose-from configuration in order to take advantage of the MCM schemes and the inherent pipelining for area-delay efficient realization of large order FIR filters for both fixed and reconfigurable applications.
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