Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate
ABSTARCT :
This paper describes a bandwidth (BW)- and slew rate (SR)-enhanced class AB voltage follower (VF). A thorough small signal analysis of the proposed and a state-of-the-art AB-enhanced VF is presented to compare their performance. The proposed circuit has 50-MHz BW, 19.5-V/µs SR, and a BW figure of merit of 41.6 (MHz × pF/µW) for CL = 50 pF. It provides 13 times higher current efficiency and 15 times higher BW than the conventional VF with equal 60-µW static power dissipation. The experimental and simulation results of a fabricated test chip in the 130-nm CMOS technology validate the proposed circuit.
EXISTING SYSTEM :
? Due to the inclusion of cascoding transistor in the feedback path, the proposed FVF cell has an additional advantage of very small variations at node ‘X’ with respect to other existing FVF configurations.
? It is evident that the proposed FVF cell offers higher slew rate, wider bandwidth, lesser noise, lower THD than the existing FVF cell.
? This trend has been mainly driven by the need to reduce power consumption of the digital circuitry in mixed-mode very large-scale integration (VLSI) systems and to prevent oxide breakdown with decreasing gate-oxide thickness.
? In addition, low power consumption and low supply voltages are requirements of the portable electronic equipment market.
DISADVANTAGE :
? The abilities of the FVF to solve the problems which appear when operating analog and mixed-signal systems with a low voltage supply.
? A drawback of this circuit is that current through transistor depends on the output current, so that is not constant and, hence, for resistive loads, the voltage gain is less than unity. A similar problem occurs with capacitive loads at high frequencies.
? A possible solution to overcome these problems is to include a dc level shifter between node and the gate of transistor, like in at the cost of increased power consumption, and reduced bandwidth.
PROPOSED SYSTEM :
• The paper proposes a class-AB flipped voltage follower (FVF) cell, in which the bulk-driven transistor is used as an input transistor with a replica-biased scheme to eliminate the DC level shift while a cascoding transistor is used to reduce the output resistance.
• The proposed FVF cell has several advantages such as low output resistance, approximately unity voltage gain, high symmetrical slew rate, high current sourcing capability, high current sinking capability and wide bandwidth.
• In the proposed FVF cell, the bulk-driven transistor is used to feed the input voltage and the cascoding transistor is used to reduce the output resistance.
ADVANTAGE :
? This is related to the SR improvement and the large signal performance of the circuit.
? The implementation technology and supply voltage can have a significant effect on the performance of a circuit.
? In this paper, the PRP-AB-VF is intended to be used as a buffer for amplifiers.
? The advantageous performance parameters of proposed FVF cell such as free from DC level shift, low output resistance, approximately unity voltage gain, high symmetrical slew rate, high current sourcing capability, high current sinking capability and wide bandwidth, make it a suitable building block for low-power and high-speed analog integrated circuits.
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