RF Power Gating: A Low Power Technique for Adaptive Radios
ABSTARCT :
In this paper, we propose a low-power technique, called RF power gating, which consists in varying the active time ratio (ATR) of the RF front end at a symbol time scale. This technique is especially well suited to adapt the power consumption of the receiver to the performance needs without changing its architecture. The effect of this technique on the bit error rate (BER) performances is studied for a basic estimator in the specific case of minimum-shift keying signaling. A system-level energy model is also derived and discussed to estimate precisely the power reduction based on the characteristics and the power consumption of each block. This model allows highlighting the different contributors of the power reduction. The BER results and the energy model are finally merged to determine the best ATR meeting the design constraints. Applying this technique to the IEEE 802.15.4 standard, this paper shows that an ATR of 20% is a good tradeoff to meet the packet error rate constraint while maximizing the energy reduction ratio. Using typical block power consumptions, an energy reduction ratio around 20% can be reached. Even better energy reduction ratios (~60%) are also achievable when most of the blocks are power-gated.
EXISTING SYSTEM :
? The largest drain current exists only on the top of each transistor and can be decreased on the way.
? The current flows downward through the transistor and is allocated by all the transistor cells.
? The breakdown appears first on the side of drain, since the largest difference between the gate-potential and the channel-potential exists at this point.
? Some of the field lines are in the dielectric region and some are in air, the relation 1 eff r < < e e always exist.
? There is a strong demand to design multi-frequency multi-standard transceivers, which can operate in different systems.
DISADVANTAGE :
? A significant problem is that this impedance is affected by parasitic capacitances of the integrated circuit package as well as electrode cable and printed circuit board (PCB) capacitances that could be as high as 50-200 pF at the input of an instrumentation amplifier (IA).
? Intermittently powering RF components directly impacts the signal at the input of the ADC.
? The impact on the SNR of such a technique has been analyzed and simulated; it strongly depends on both the duty-cycle of the ON and OFF states and the transitions between them.
? A cascode device whose gate is connected to an AC ground typically only has a small impact on the overall linearity of a cascode common-source LNA.
PROPOSED SYSTEM :
• In this dissertation, linearity enhancement techniques for analog RF front-ends are proposed and demonstrated with a subthreshold low-noise amplifier (LNA) and an active down-conversion mixer.
• In addition, digitally programmable elements have also been proposed to counteract the sensitivity to manufacturing process variations.
• An input impedance tuning method was proposed that involves a programmable capacitance to provide digital calibration control.
• The proposed linearization method involves extra passive components to accomplish partial cancellation of third-order nonlinearity products.
ADVANTAGE :
? These simple, ultralow power and low-performance radios allow the channel sensing and can communicate through a high-quality RF link.
? The technique presented throughout this paper is a part of the adaptive radios field and aims at scaling the RX performances with the power consumption without changing the RX architecture.
? This paper expresses and underlines the tradeoff between the BER performance degradation due to not observing the MSK-modulated signal during the whole symbol time and the power saving obtained.
? The study presented gives to the designers, interested in using this adaptive solution with their full performance RXs, a set of key parameters controlling the tradeoffs involved when using RFPG.
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