Frequency-Boost Jitter Reduction for Voltage-Controlled Ring Oscillators
ABSTARCT :
Ring oscillators (ROs) are popular due to their small area, modest power, wide tuning range, and ease of scaling with process technology. However, their use in many applications is limited due to poor phase noise and jitter performance. Thermal noise and flicker noise contribute jitter that decreases inversely with oscillation frequency. This paper describes a frequencyboost technique to reduce jitter in ROs. We boost the internal oscillation frequency and introduce a frequency divider following the oscillator to maintain the desired output frequency. This approach offers reduced jitter as well as the opportunity to trade off output jitter with power for dynamic performance management. The oscillator has 32 operating modes, corresponding to different values for the ring size and frequency division. In a 0.5-µm CMOS process, the highest oscillation frequency achieved is 25 MHz with a root-mean-square period jitter of 54 ps and a power consumption of 817 µW at 5 V supply. A jitter model for current-starved oscillators was derived and verified by measurement; a direct relationship between oscillation frequency and jitter was derived and measured. Compared with other oscillators, this design achieves the highest performance in terms of jitter per unit interval and figure-of-merit. The performance is expected to improve in more advanced technologies. The results are summarized to offer design guidance based on the frequency boost technique.
EXISTING SYSTEM :
? That exists regarding the optimum , since there is not a strong dependence on the number of stages for single-ended CMOS ring oscillators.
? The noise-to-phase transfer function of oscillators is still linear, despite the existence of the nonlinearities necessary for amplitude stabilization.
? Linear relationships may exist between certain variable pairs at the same time nonlinear ones exist between others.
? It has long been known that the best phase noise occurs for a certain narrow range of tapping ratios, but before the LTV theory, no theoretical basis existed to explain a particular optimum.
DISADVANTAGE :
? It is worth mentioning that designing VCOs is a challenge; besides, one can find guidelines to deal with modern design issues, such as ultra-low-power requirements.
? In this manner, the first task is identifying the design issues to increase the frequency response of the CML block.
? In integrated circuit design, ?p is directly proportional to the gain-bandwidth-product (GBW), and considering the trade-off between GBW and the open-loop gain AOL, the most important issue is enhancing GBW.
? The common-mode sensitivity problem in a single-ended ring oscillator can be mitigated to some extent by using two identical ring oscillators laid out close to each other that oscillate out of phase because of small coupling inverters.
PROPOSED SYSTEM :
• The proposed VCO uses four stages and a higher load capacitance compared to the one in, and it provides the higher frequency tuning range while maintaining an acceptable control-voltage range, power dissipation and supply sensitivity.
• The proposed VCRO has been tested both as a PLL building block and as a time interpolator for the pixel-level TDC.
• All the proposed models are meant to obtain the first order approximation in an iterative simulator-assisted design procedure.
• This feature renders the proposed architecture very well suited for high frame rate d-ToF imagers.
ADVANTAGE :
? A dual control VCO and a fourth-order PLL were used to stabilize VCO gain over process variations and frequency shifts, which in turn maintained the PLL bandwidth to improve jitter performance.
? However, ROs are generally considered to have poor phase noise and jitter performance that adversely affect the system performance.
? There are other techniques that do not require a PLL, but can potentially be incorporated into a PLL to further improve jitter performance.
? An oscillator followed by an FD is widely used but rarely are they designed as one unit and their overall performance reported.
? When power is also an important design consideration, the FOM is a more relevant performance metric.
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